Job Description :
In your new role you will:
1. Definition of new test-cases similar to product definition and for designing significant blocks of chip, including chip architecture and chip top integration, with the focus on improving Quality of Design System.
2. Ownership of analog sub-blocks/chip level (specification and implementation). It includes transistor and block level design, simulation, reliability and mixed mode simulations.
3. Definition, design and release of high-performance converter /RF products and Verification of complex designs and subsystems
4. Develop and execute QA test plans, verification methodology & test strategies for analog block/chip level to maximize the coverage of features/methodology supported in the technologies/Design Flows.
5. Responsibility for the setup, running of test cases, analysing failures and bug fix validation and verification by analysing the all device models/components in the technology and ensure 100% coverage in the test plan/test-cases.
6. Work with design team/product team in generating test-plans and closure of code and functional coverage.
7. Analyse key coverage metrics collected, build regression status reporting dashboard and come up with missing test cases
8. Responsible for automation of manual processes (including design flow/design package qualification mechanisms, generation of test reports/dashboards etc.) and providing automation requirements for reducing manual steps in qualification.
9. Working in compliance with all Infineon Quality/Process.
Your ProfileYou are best equipped for this task if you have:
12+ years of experience, BE/BTech (E&CE or Electrical) or ME/Mtech (Electronics or VLSI)
• Experience in high-performance analog or mixed-signal IC development in advanced CMOS, BiCMOS, SOI processes.
• Layout Design in technologies with feature 0.18um,90nm, 65nm, 40nm, 22nm
• Experience in designing high-speed, high-resolution analog-to-digital (ADC) or digital-to-analog (DAC) data converter design, and building block circuits such as power amplifiers, oscillators, LDO etc.
• Well versed in MOS and BJT Device Physics
• Good understanding of Analog and Mixed Design Simulation flow, tools and methodologies (circuit design and schematic based)
• Good understanding of ESD concept and circuit design, RF methodology and circuit design, High-voltage circuit design, Inductor and Transformer based circuit design.
• Basic understanding of layout design. Device models concepts.
• Working knowledge of EDA tools (especially simulation/verification)
a. Schematic and Layout Entry : Cadence Virtuoso
b. Circuit Simulators : Spectre, XA, AMS designer
c. Analog Verification Tools : ADE-L and ADE-XL, Sonnet, Momentum flow.
d. Physical Verification & Layout Parasitic Extraction: Calibre LVS and Cadence-QRC
e. Circuit reliability signoff checks: modeling simulation and aging effects, soac checks. RF design flow.
f. Programming in Skill(Cadence), Ocean
• Familiarity with Automated Regression Test Frameworks and Jenkins based test setups
Benefits
What we offer you at Bangalore
In India a team of 200 people works on hardware and software development for automotive and chip card & security solutions.
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