Hi,
Hope you doing well.
We do have openings with US Product based company
If you have any interested please send your Updated CV.
JOB REQUIREMENTS:
Expert in Front End Verification using SV-UVM based test benches.
Should have developed SV -UVM test benches for multiple projects
Should have Developed SV / C based test cases and participated in complete verification cycle including coverage closure and Gate Sims
Good understanding of integrating C with SV – UVM test benches
Able to define verification methodologies and quality metrics for verification projects
Should have expertise in defining Test plans for Block, IP, Sub-System , SoC verification
Good debugging and problem solving skills.
Expertise with ASIC simulation, regressions and coverage tracking tools
Ability to multi-task and meet aggressive goals
Experience in defining and closing coverage requirements.
Experience with scripting languages like Perl, Python
Experience of working with PCIe , AXI, AHB, SERDES systems
Experience of writing assertions and working with Formal verification tools
Setup Automated regressions environment and in general automate repetitive verification tasks to enhance productivity
Experience of Co-working with SW and C Model development teams to integrate their deliverables into verification test bench
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