Job Description :
Requirements:
1) Experienced between 5 – 9 years
2) Bachelors in Computer Science/Electronics Engineering Mandatory Skills: Basics of processor architecture, Multicore/Multiprocessor with SMP/heterogeneous cores.
3) C language expertise for low level programming, Assembly language for any processor, C-assembly interworking Operating systems/RTOS/Linux kernel internals, scheduling policies, locking mechanism, MMU/paging etc.
4) Should know C and have some post silicon experience.
5) Good knowledge of ARM Cortex-A7) / x86 / PowerPC CPU and memory system architecture Weakly ordered memory model/pipelining of memory systems/memory barriers Software development towards higher performance of multi-threaded applications using lower power Top level of ASIC design methodology is an added skill.
6) Exposure to working on emulation/pre-si environment is added advantage Using JTAG based debuggers, compilers/linkers.
7) Should have good exposure to software development life cycle Desired Skills Exposure to SoC architecture paradigms interconnects, power management, Software development for silicon enablement, silicon validation Bring-up of hardware-software solution on FPGA/emulation platforms and on fresh SOC designs Software for power/performance KPIs.
8) Use silicon debug hooks to measure power/performance/coverage and other KPI metrics Senior engineers are expected to work with very minimal supervision and mentoring junior engineers.
9) Responsibilities : Understand the IP architecture, work with IP validation teams and Systems validation Lead/system content engineer to understand the validation requirements, develop/port/enhance the validation software content and bring up.
For more details contact: HR Gayathri – 8695435355 / [HIDDEN TEXT]
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